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MSP-320 Media Stream Gateway
The First M.100-Compliant Open-Architecture
Computer Telephony Board


Specifications


Compatibility- PCI bus (3.3 volt)
Form factor - Full-size PCI
Initialization - Plug-and-Play
Connectors - RJ-45 Ethernet, H.100, 10-pin right-angle RS-232, 14-pin right-angle JTAG
Co-Processor - Intel 386EX
Co-Processor RAM - 4-Mbytes 60 nsec DRAM
Flash EPROM - 512-Kbytes
DSPs - Two TI TMS320C6201
DSP RAM - 16-Mbytes 100-MHz SDRAM
Flash EPROM - 512-Kbytes
PCM access - Dual-port RAM
Ethernet - 10 baseT
Console - RS-232C
Security Button - Battery, 64-bit ID, 1152 bits storage
Shared-Access RAM - 4-16 Mbytes fast-page DRAM
Testing - JTAG bus on all LSI devices except PCI Controller
Daughter Card Interface - PCM highway, Shared-Access RAM, internal PCI bus



 
 
 

The Commetrex MSP-320 Media Stream Gateway is an open hardware platform for the implementation of high-capacity integrated-media PC communications systems. The MSP-320, capable of processing 256 PCM streams, includes the resources to support all the media-processing needs of the modern enterprise communications server: high-speed data and fax, Internet telephony, voice processing for messaging, video processing, text-to-speech, and speech recognition.

MSP-320 is being offered in an uprecedented fashion. The board is sold at a fixed price regardless of the quantity purchased. Board-level and media-processing software are licensed separately and qualify for discounts.

OEMs wishing to base their proprietary systems on an open, flexible, high performance DSP board while avoiding the months of effort needed to design and produce it, may purchase MSP-320 as a hardware platform for the implementation of high-capacity integrated-media DSP-based systems. These OEMs may license the Board-Level Developer's Kit or the OpenMedia Software Developer's Kit from Commetrex to assist in the creation of their products.

For those developers wishing to create systems with an application-level API, Commetrex offers Open Telecommunications Framework® (OTF) system framework and media processing software including PowerCall (signaling and call control), PowerVOX (voice processing) and PowerFax (fax processing). Commetrex' approach to the licensing of this media-processing software is unique as well. With other telephony boards the cost of the runtime licenses for board-level, call-control, signalling and voice processing software is bundled into the price of the board. The developer pays for it whether it is used or not. Rather than Commetrex charging a flat fee per board for this software, developers may purchase runtime licenses for each of them separately and in only the quantities needed.

For media-processing the MSP-320 includes two 1,600 MIPs Texas Instruments TMS320C6201 task processors, each with 16-Mbytes of 100-MHz synchronous DRAM. The board's co-processor is a 20-MHz Intel 386EX with 4 Mbytes of 60-ns DRAM. The MSP-320 and the host PC communicate via a PCI plug-and-play interface. Telephony streams may be made available from the host PC, network interfaces on the optional daughter board, the board's 10 baseT interface, or via the H.100 industry-standard PCM highway.

All of these, plus the task and co-processors, can access a shared-access 4-16 MByte fast-page DRAM. These resources allow the system designer to meet the media and port-capacity requirements of nearly all systems with just one PCI add-in board. Media-processing capacities of over 30 G.723.1 audio streams, speech recognition, or V.34+ modems(in development) in any combination may be supported; hundreds of ADPCM voice ports can be implemented.

When combined with the optional MSP Consortium M.100-compliant stream-processing SDK, the MSP-320 becomes an open hardware-software environment for the media-processing software developer. M.100 specifies a comprehensive multi-stream software environment which permits media-processing vendors to develop to one open, portable environment, rather than for multiple proprietary environments which lack the potential of broad market coverage. For those OEMs and system integrators with requirements that can be met with off-the-shelf M.100-compliant products, the MSP-320 product line includes the M.100 execution environment.

Features

  • 3,200 MIPs of DSP power
  • 16-Mbytes SDRAM per DSP
  • H.100 PCM compliant
  • 386EX co-processor with 4-Mbytes RAM
  • 4-16-Mbytes shared-access DRAM
  • Daughter-board interface
  • PCI Plug-n-Play host-PC interface
  • Ethernet interface
  • 2-Kbytes EEPROM
  • Serial console interface

Benefits

  • High-density compact systems
  • High port capacity
  • Multiple media per board
  • Multiple vendors per board
  • Productive development
  • Compatibility with H.100/MVIP
  • Improved strategic options
  • Configuration flexibility
  • Low-cost hardware testing

System Architecture
The MSP-320 can be either a computer-telephony resource module in a PCI-based PC or a system component inter-connected via a 10 baseT Ethernet connection. Stream data may be obtained from several sources: the H.100 PCM bus, the PCI bus, the Ethernet interface, or the optional daughter card. The board's internal PCM bus carries 256 64-K PCM time slots.

The MSP-320 system is managed by the 386EX co-processor. It is responsible for cold-start processing and interfacing with external systems. Cold-start code is loaded from a large flash EPROM for each of the three on-board processors. Stream processing is provided by the co-processor assisted by two 1,600 MIPs task processors. In addition to the large private RAM provided for each processor, the system includes a 4-16 MByte Shared-Access RAM.

Co-Processor Module
The MSP-320 co-processor is an Intel 386EX large-memory, 32-bit, general-purpose processor with built-in memory management, intended to support multi-vendor C-coded applications managing the media processing of up to 256 media streams. With any of the optional MSP-320 software environments, the Co-Processor hosts the QNX Neutrino Microkernel which, in turn supports the M.100 MSP execution environment.

Much of the power and flexibility of the MSP-320 are derived from its co-processor. While the lack of a co-processor can be overcome by excess DSP capacity and host-PC processing, it is more effective to apply DSP resources to stream processing than to so-called scalar processing tasks. And being forced to allocate processing to the host rather than the embedded system limits performance.

The inclusion of a powerful co-processor gives the needed flexibility in the implementation of host, stream-signaling, and PCM interfaces, plus the ability to manage the board's resources. For example, the MSP-320 SDK's optional TCP/IP protocol stack executes on the co-processor without consuming DSP resources or requiring the data to be needlessly transferred to the host.

The co-processor module includes the following:

  • 512-Kbytes of flash EPROM for cold-boot and self diagnostics
  • 4-Mbytes of DRAM
  • Shared RAM access
  • PCI access
  • 2-Kbit serial EEPROM for board ID, configuration, and license administration
  • 10 baseT Ethernet controller with 32-Kbytes of SRAM
  • RS-232 console port
  • Security button with battery
  • Two general-purpose timers
  • Watchdog timer
  • Parallel I/O ports
  • JTAG port for boundary-scan testing

Console Interface
The MSP-320 includes an RS-232 interface which supports a console-device connection to the co-processor. This interface is helpful as a direct operator interface during embedded-environment integration testing by bypassing the host PC, and could serve as the primary console interface in Ethernet-connected systems.

Security Button
The Security Button is a co-processor-controlled serial device which can be used to store and retrieve controlled-access information, such as passwords for runtime-license administration. The button provides a 64-bit unique ID and three 384-bit fields of password-protected, battery-backed-up RAM.

The Security Button is sealed in a miniature stainless-steel case, similar to a watch battery. It is attached to the board by a clip, allowing it to be removed. The battery has a life of 10 years.

Task Processor Module
Each of the MSP-320 task processor modules (TPMs) include the Texas Instruments TMS320C6201 DSP equipped with 4-Mbytes of synchronous DRAM (SDRAM).

Additionally, the TPM includes the following:

  • Flash EPROM
  • PCM bus interface
  • Shared RAM interface
  • JTAG interface
  • PCI interface

The SDRAM is configured as two interleaved banks of 512-Kbytes by 32-bits. SDRAM was chosen because it permits the MSP-320 to use the task processor's clock to simplify design and enhance performance. The burst-mode data access on the SDRAM is the native mode of memory access of the 'C6201. After four 5-nsec clock cycles the SDRAM furnishes the processor with a new 32-bit word every 10 nsec

512-Kbytes of boot flash EPROM, configured as 512K x 8-bit is included with each TPM. The 'C6201 processor is capable of dynamic bus sizing, and assembles the 32-bit words internally. It is configured for Intel-compatible Little Endian mode. Stream data can be sourced from the H.100 PCM interface, the optional daughter board, the Ethernet controller, or the host PC via the PCI interface.

The MSP-320 internal PCM bus has 256 time slots. The PCM data are converted to parallel and accumulated in a circular buffer in 256-byte/frame sections of a 2K x 8-bit Dual-Port RAM (DPR). The circular buffer holds 8 consecutive frames. The buffer is divided into two blocks of four consecutive PCM bytes, corresponding to four consecutive frames of the same time slot.

The task processor (TP) has a 32-bit-wide data bus interface to the Shared RAM, allowing the TP to exchange data with the co-processor, the PCI Bus, and the daughter board. Access to the shared RAM is controlled by a round-robin arbiter.

The TP includes a JTAG Bus Interface allowing boundary-value testing and in-circuit emulation. The JTAG port is a superset of the IEEE 1149.1 standard.

Shared-Access DRAM
The Shared RAM is a 4-16 MByte Fast Page DRAM common memory section, accessible to the Co-processor, the Task Processors, the Daughter Board, the PCI bus interface, and a Refresh Controller. The shared memory allows convenient, low-overhead command and data exchange between the devices accessing it. Memory allocation is managed by the Co-Processor. Memory access is 16-bit for the Co-Processor and the Daughter Board and 32-bit for the Task Processors and PCI bus. Access is governed by the Shared RAM Arbiter.

PCI Interface
The MSP-320 is a "Plug & Play" (P-n-P) 32-bit, 33-MHz PCI Bus module. The P-n-P architecture allows jumper-free, all-software configurability of the card. It allows the host PC to assign addressing ranges, interrupts, and DMA request lines to each P-n-P card at power-up. P-n-P also allows conflict detection and on-the-fly configuration changes in the event of a conflict. The P-n-P architecture preserves full interoperability with legacy (non-P-n-P) cards, but the mixed system will not be fully auto-configurable.

The PCI Bus interface is a single-chip solution implemented using the PCI-9080 Master/Slave PCI Bus Controller. The PCI-9080 provides a compact high-performance PCI bus master interface for adapter boards and embedded systems.

The PCI-9080 provides two independent chaining DMA channels with bi-directional FIFOs supporting zero-wait-state burst transfers between host and local memory. Slave transfers are performed through a third FIFO. A fourth FIFO allows the local processor and other controllers to perform direct bus-master transfers to the PCI bus. The PCI-9080 can also enable the local processor to configure other PCI devices in the system.

H.100
The industry-standard H.100 PCM highway provides the system designer with up to 4096 duplex PCM time slots, and backwards compatibility with MVIP-90, MVIP-95, and SCbus specifications.

The MSP-320 H.100 interface is implemented with the Lucent Technologies Ambassador( T8100 integrated circuit. It provides a complete solution to interfacing with the H.100 bus, and provides programmable switching between the MSP-320's 256 local time slots and the H.100 bus.

Daughter Board Interface
The optional MSP-320 daughter board is an open-specification add-on module to support the addition of Shared-Access RAM, network interfaces, or task-processor modules.

The board's 256-time slot PCM bus is made available to the daughter board.

Test Facilities
With the exception of the PCI-9080, the PCI Bus Controller which incorporates Nand-Tree Built-In-Self-Test (BIST) circuitry, all on-board LSI devices incorporate an IEEE 1149.1-compliant JTAG test interface for board-level initialization and testing. The MSP-320 JTAG circuits are accessed through the standard PCI Bus JTAG interface pins. In addition, the MSP-320 incorporates an on-board connector which is a super-set of the JTAG bus, and allows in-circuit emulation of the 'C6201 Task Processors. When the system is in the Task Processor Emulation mode, the on-board JTAG connector is used by the Emulator, and the JTAG pins on the PCI Bus connector are bypassed.

The MSP-320 is available with OTF, Commetrex' comprehensive telephony system framework. Supported media technologies include PowerCall for OTF, PowerFax for OTF, and PowerVox for OTF.
 
 

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Commetrex, OpenMedia, MSP-320 Media Stream Gateway, MultiFax, PowerCall, PowerVox, PowerFax, Open Telecommunications Framework and OTF are trademarks of Commetrex Corporation. All other trademarks are the property of their respective holders. Specifications subject to change without notice.
 
 

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